Microchip technology has come a long way and nowadays it is used virtually everywhere. For example, sensors in cars automatically check several factors like traction, visibility and velocity and react accordingly – making driving safer than ever!
Sometimes, great things come with years of experience and hard engineering. Analog circuit design is no exception: As you probably know, the verification process of designing microchips can be tiring, hair-pulling and time-consuming. Let us introduce the solution to this problem:
C-FRISK is an AI software which automates verification testing, so that you can focus on the important things: designing your microchip.As far as project management goes, through automated project plans, you can save time and money.

So what exactly does C-FRISK do for you? It analyses every single block of an analog microchip and looks for inconsistencies. For every detected error, C-FRISK will offer you possible solutions, enhancements or corrections. With the help of self-learning AI, it corrects errors automatically and simplifies the process. C-FRISK then redraws new schematics to reduce circuit design time. With these new diagrams, it auto-creates test benches and models essential for complete and correct verification.
With C-FRISK you’ll be in control of an entire team of AI avatars, each assigned a different role like modeling engineers, project engineers and many more. If necessary, you can restructure your team or add members if needed. Your virtual team does all the tedious work, making your job much more efficient and rewarding.

C–FRISK does the trouble shooting so you can do the problem-solving.

Should the netlist analysis phase recognise a combinatorial logic block, a modelling avatar will automatically transform it in Verilog for you.

Based on the size and complexity of your netlist, a project planning avatar will assemble all data relevant for an in-depth verification project plan for design other reviews including project duration estimates, Gant charts or task sequencing.

Whenever an amplifying structure is encountered, the verification avatar identifies all relevant inputs and outputs and performs a detailed ac-analysis over the relevant operating points.